On February 24, Nvidia was revealed to have locked in more than 70% of TSMC's CoWoS-L advanced packaging capacity throughout the year.According to supply chain data, NVIDIA's Blackwell architecture GPU chips are expected to increase by more than 20% month-on-month, and the total annual shipments are expected to exceed 2 million chips. Its order size is sufficient to support the proportion of TSMC's advanced packaging business revenue from 2024. 8% jumped to more than 10%.

The underlying logic of this order lies in the rigid requirements of AI infrastructure.As the U.S."Stargate" program accelerates, the purchase demand for AI servers by the four major cloud service providers (Amazon AWS, Microsoft Azure, Google Cloud, and Alibaba Cloud) continues to operate at a high level, forcing Nvidia to ensure supply by locking in key production capacity. Chain security.

As TSMC's latest packaging solution, CoWoS-L technology can expand the chip size by more than 30% by combining a re-routing layer (RDL) and a silicon interposer (LSI), and stack more high-frequency wide memories (HBMs), making the computing power density of Blackwell chips 50% higher than that of previous generations.This intergenerational difference in technology directly translates into market barriers-while AMD's MI300 series is still using the previous generation SoIC+CoWoS hybrid package, NVIDIA has formed a moat through exclusive binding of the most advanced technologies.

TSMC's capacity expansion strategy has also become the focus of the industrial chain game.In order to meet the incremental needs of customers such as Nvidia, TSMC plans to invest more than NT$200 billion to build eight new packaging plants in 2025 after tripling its CoWoS production capacity in 2024. Among them, all six new plants in Nanke Park focus on the CoWoS-L production line.Behind this aggressive expansion is the financial temptation of advanced packaging gross margins exceeding the company's average, and the certainty of extending the AI chip order cycle from five years to eight years.However, the production capacity bottleneck has not yet been completely solved: TSMC has outsourced part of its WoS (Wafer on Substrate) packaging process to Riyue Light and Jingyuan Electronics, which has tested that the utilization rate of the latter has reached 100%. Although this "core process autonomy + edge link outsourcing" model can relieve the pressure in the short term, it also hides the hidden danger of declining supply chain response speed.

The fission of the industry's competitive landscape is accelerating.Although NVIDIA currently accounts for 70% of TSMC's CoWoS-L production capacity, AMD has seized 13% of the market share thanks to the breakthrough of the MI300 series among customers such as Microsoft Azure, and manufacturers such as Broadcom and Intel are also competing for the remaining space through customized packaging solutions.What is more noteworthy is that Samsung plans to double HBM packaging production capacity in 2027 through the expansion of its Suzhou factory and the construction of its Yokohama R & D laboratory. Its glass substrate technology may pose an alternative threat to TSMC's silicon interposer solution.This differentiation of technical paths indicates that the advanced packaging field may repeat the multi-polar confrontation during the process competition period.

However, the hidden risks behind this carnival cannot be ignored.On the one hand, in order to hedge against U.S. chip tariff pressure, TSMC plans to increase the price increase of advanced process OEMs from 5-10% to more than 15%. Cost transmission may squeeze Nvidia's gross profit margin; On the other hand, DeepSeek, a major model company in China, has reduced training costs to US$6 million through algorithm optimization. If its open source strategy triggers the industry to follow suit, it may shake the industrial logic of "computing power accumulation = performance improvement", which will then impact the long-term demand for high-end GPUs.Data shows that after the release of the DeepSeek-R1 model, Nvidia's U.S. stocks fell more than 11% before the market, and the market's doubts about the sustainability of computing power demand have changed from undercurrent to explicit risks.

In this AI-driven restructuring of the industrial chain, a more paradoxical trend is emerging: when Moore's Law approaches the physical limit, packaging technology has instead become the core engine that continues the growth of computing power, but the cost of this technological transition ultimately needs to be absorbed by the commercial efficiency of downstream application scenarios.

Although the deep binding between Nvidia and TSMC has temporarily stabilized the fundamentals of production capacity, if the implementation speed of AI applications falls short of expectations, the current crazily expanding packaging capacity may become the trigger of a new round of inventory crisis.For investors, the key to this game has shifted from "who can make the fastest chip" to "who can maximize computing power and packaging efficiency at the lowest cost"-this may be the real match point for the semiconductor industry to enter the "post-Moore era."

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